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• Parse-statements

Vl-parse-concurrent-assertion-statement

Parse a concurrent_assertion_statement, returning a vl-cassertion.

Signature

(vl-parse-concurrent-assertion-statement &key (tokstream 'tokstream) 
                                         (config 'config)) 
 
  → 
(mv errmsg? value new-tokstream)

Arguments

config — Guard (vl-loadconfig-p config).

Almost the SystemVerilog-2012 grammar:

concurrent_assertion_statement ::= assert_property_statement
                                 | assume_property_statement
                                 | cover_property_statement
                                 | cover_sequence_statement
                                 | restrict_property_statement

assert_property_statement ::= 'assert' 'property' '(' property_spec ')' action_block
assume_property_statement ::= 'assume' 'property' '(' property_spec ')' action_block
cover_property_statement ::= 'cover' 'property' '(' property_spec ')' statement_or_null
cover_sequence_statement ::= 'cover' 'sequence' '(' property_spec ')' statement_or_null
restrict_property_statement::= 'restrict' 'property' '(' property_spec ')' ';'

The real grammar doesn't use a property_spec in the case of cover sequence, but the only difference is that it requires a sequence_expr instead of a property_expr, which we don't distinguish between at parse time. So, the above is what we implement.