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• Sdm-instruction-set-summary

5.5 Intel(R) SSE Instructions

Subsections

Total instructions: 71, Implemented: 45, Unimplemented: 26

Subsection	Implemented	Unimplemented	Total
5.5.1 Intel(R) SSE SIMD Single Precision Floating-Point Instructions	39	9	48
5.5.2 Intel(R) SSE MXCSR State Management Instructions	2	0	2
5.5.3 Intel(R) SSE 64-Bit SIMD Integer Instructions	0	13	13
5.5.4 Intel(R) SSE Cacheability Control, Prefetch, and Instruction Ordering Instructions	4	4	8

Subtopics

5.5.4 Intel(R) SSE Cacheability Control, Prefetch, and Instruction Ordering Instructions

5.5.3 Intel(R) SSE 64-Bit SIMD Integer Instructions

5.5.1 Intel(R) SSE SIMD Single Precision Floating-Point Instructions

5.5.2 Intel(R) SSE MXCSR State Management Instructions