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      • Program-execution
      • Sdm-instruction-set-summary
        • 5.50 Uncategorized "Instructions"
        • 5.15 Fused-Multiply-Add (FMA)
        • 5.20 System Instructions
        • 5.19 Intel(R) Advanced Vector Extensions 512 (Intel(R) AVX-512)
        • 5.1 General-Purpose Instructions
          • 5.1.2 Binary Arithmetic Instructions
          • 5.1.1 Data Transfer Instructions
          • 5.1.16 BMI1 and BMI2 Instructions
          • 5.1.5 Shift and Rotate Instructions
          • 5.1.4 Logical Instructions
          • 5.1.7 Control Transfer Instructions
          • 5.1.6 Bit and Byte Instructions
          • 5.1.13 Miscellaneous Instructions
          • 5.1.15 Random Number Generator Instructions
          • 5.1.8 String Instructions
          • 5.1.9 I/O Instructions
          • 5.1.14 User Mode Extended State Save/Restore Instructions
          • 5.1.11 Flag Control (EFLAG) Instructions
          • 5.1.10 Enter and Leave Instructions
          • 5.1.3 Decimal Arithmetic Instructions
          • 5.1.12 Segment Register Instructions
        • 5.10 Intel(R) SSE4.1 Instructions
        • 5.13 Intel(R) Advanced Vector Extensions (Intel(R) AVX)
        • 5.7 Intel(R) SSE3 Instructions
        • 5.8 Supplemental Streaming Simd Extensions 3 (SSSE3) Instructions
        • 5.4 MMX Instructions
        • 5.22 Virtual-Machine Extensions
        • 5.6 Intel(R) SSE2 Instructions
        • 5.21 64-Bit Mode Instructions
        • 5.2 X87 FPU Instructions
        • 5.24 Intel(R) Memory Protection Extensions
        • 5.5 Intel(R) SSE Instructions
        • 5.16 Intel(R) Advanced Vector Extensions 2 (Intel(R) AVX2)
        • 5.12 Intel(R) AES-NI And PCLMULQDQ
        • 5.17 Intel(R) Transactional Synchronization Extensions (Intel(R) Tsx)
        • 5.14 16-Bit Floating-Point Conversion
        • 5.18 Intel(R) SHA Extensions
        • 5.11 Intel(R) SSE4.2 Instruction Set
        • 5.3 X87 FPU and SIMD State Management Instructions
        • 5.40 Other ISA Extensions
        • 5.25 Intel(R) Software Guard Extensions
        • 5.27 Control Transfer Terminating Instructions
        • 5.23 Safer Mode Extensions
        • 5.30 Enqueue Store Instructions
        • 5.29 User Interrupt Instructions
        • 5.28 Intel(R) AMX Instructions
        • 5.26 Shadow Stack Management Instructions
        • 5.31 Intel(R) Advanced Vector Extensions 10 Version 1 Instructions
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• 5.1 General-Purpose Instructions

5.1.7 Control Transfer Instructions

Unimplemented instructions are:

• BOUND -- not valid in 64 bit mode
• ENTER
• RET -- only far return with immediate (0xCA)
• INT -- software interrupt
• INTO -- overflow trap
• JMP (0xEA) -- Jump far, absolute indirect (invalid in 64 bit mode)

Unimplemented Instructions

Opcode	Mnemonic	Other Information	Semantic Function
62	BOUND	:MODE :I64
9A	CALL	:MODE :I64
C8	ENTER
CA	RET
CD	INT
CE	INTO	:MODE :I64
EA	JMP	:MODE :I64
F1	INT1

Implemented Instructions

Opcode	Mnemonic	Other Information	Semantic Function
70	JO		x86-one-byte-jcc
71	JNO		x86-one-byte-jcc
72	JB/NAE/C		x86-one-byte-jcc
73	JNB/AE/NC		x86-one-byte-jcc
74	JZ/E		x86-one-byte-jcc
75	JNZ/NE		x86-one-byte-jcc
76	JBE/NA		x86-one-byte-jcc
77	JNBE/A		x86-one-byte-jcc
78	JS		x86-one-byte-jcc
79	JNS		x86-one-byte-jcc
7A	JP/PE		x86-one-byte-jcc
7B	JNP/PO		x86-one-byte-jcc
7C	JL/NGE		x86-one-byte-jcc
7D	JNL/GE		x86-one-byte-jcc
7E	JLE/NG		x86-one-byte-jcc
7F	JNLE/G		x86-one-byte-jcc
C2	RET		x86-ret
C3	RET		x86-ret
C9	LEAVE		x86-leave
CB	RET		x86-ret
CC	INT3		x86-int3
CF	IRET/D/Q		x86-iret
E0	LOOPNE/LOOPNZ		x86-loop
E1	LOOPE/LOOPZ		x86-loop
E2	LOOP		x86-loop
E3	JrCXZ		x86-jrcxz
E8	CALL		x86-call-e8-op/en-m
E9	JMP		x86-near-jmp-op/en-d
EB	JMP		x86-near-jmp-op/en-d
0F 80	JO		x86-two-byte-jcc
0F 81	JNO		x86-two-byte-jcc
0F 82	JB/NAE/C		x86-two-byte-jcc
0F 83	JNB/AE/NC		x86-two-byte-jcc
0F 84	JZ/E		x86-two-byte-jcc
0F 85	JNZ/NE		x86-two-byte-jcc
0F 86	JBE/NA		x86-two-byte-jcc
0F 87	JNBE/A		x86-two-byte-jcc
0F 88	JS		x86-two-byte-jcc
0F 89	JNS		x86-two-byte-jcc
0F 8A	JP/PE		x86-two-byte-jcc
0F 8B	JNP/PO		x86-two-byte-jcc
0F 8C	JL/NGE		x86-two-byte-jcc
0F 8D	JNL/GE		x86-two-byte-jcc
0F 8E	JLE/NG		x86-two-byte-jcc
0F 8F	JNLE/G		x86-two-byte-jcc