Parse a
(vl-parse-seq-block atts &key (tokstream 'tokstream)
(config 'config))
→
(mv errmsg? value new-tokstream)Verilog-2005:
seq_block ::= 'begin' [ ':' identifier { block_item_declaration } ]
{ statement }
'end'
SystemVerilog-2012 extends this so that even unnamed blocks can have declarations, and adds end-block names.
seq_block ::= 'begin' [ ':' identifier ]
{ block_item_declaration }
{ statement_or_null }
'end' [ ':' identifier ]