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        • Program-execution
        • Sdm-instruction-set-summary
          • 5.50 Uncategorized "Instructions"
          • 5.15 Fused-Multiply-Add (FMA)
          • 5.20 System Instructions
          • 5.19 Intel(R) Advanced Vector Extensions 512 (Intel(R) AVX-512)
          • 5.1 General-Purpose Instructions
          • 5.10 Intel(R) SSE4.1 Instructions
            • 5.10.8 Packed Integer Format Conversions
            • 5.10.7 Insertion and Extractions from XMM Registers
            • 5.10.5 Packed Integer MIN/MAX Instructions
            • 5.10.4 Packed Blending Instructions
            • 5.10.6 Floating-Point Round Instructions with Selectable Rounding Mode
            • 5.10.2 Floating-Point Dot Product Instructions
            • 5.10.1 Dword Multiply Instructions
            • 5.10.10 Horizontal Search
            • 5.10.9 Improved Sums of Absolute Differences (SAD) for 4-Byte Blocks
            • 5.10.3 Streaming Load Hint Instruction
            • 5.10.13 Dword Packing With Unsigned Saturation
            • 5.10.12 Packed Qword Equality Comparisons
            • 5.10.11 Packed Test
            • 5.13 Intel(R) Advanced Vector Extensions (Intel(R) AVX)
            • 5.7 Intel(R) SSE3 Instructions
            • 5.8 Supplemental Streaming Simd Extensions 3 (SSSE3) Instructions
            • 5.4 MMX Instructions
            • 5.22 Virtual-Machine Extensions
            • 5.6 Intel(R) SSE2 Instructions
            • 5.21 64-Bit Mode Instructions
            • 5.2 X87 FPU Instructions
            • 5.24 Intel(R) Memory Protection Extensions
            • 5.5 Intel(R) SSE Instructions
            • 5.16 Intel(R) Advanced Vector Extensions 2 (Intel(R) AVX2)
            • 5.12 Intel(R) AES-NI And PCLMULQDQ
            • 5.17 Intel(R) Transactional Synchronization Extensions (Intel(R) Tsx)
            • 5.14 16-Bit Floating-Point Conversion
            • 5.18 Intel(R) SHA Extensions
            • 5.11 Intel(R) SSE4.2 Instruction Set
            • 5.3 X87 FPU and SIMD State Management Instructions
            • 5.40 Other ISA Extensions
            • 5.25 Intel(R) Software Guard Extensions
            • 5.27 Control Transfer Terminating Instructions
            • 5.23 Safer Mode Extensions
            • 5.30 Enqueue Store Instructions
            • 5.29 User Interrupt Instructions
            • 5.28 Intel(R) AMX Instructions
            • 5.26 Shadow Stack Management Instructions
            • 5.31 Intel(R) Advanced Vector Extensions 10 Version 1 Instructions
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    • 5.10 Intel(R) SSE4.1 Instructions

    5.10.11 Packed Test

    Unimplemented Instructions

    Opcode Mnemonic Other Information Semantic Function
    66 0F 38 17 PTEST
    :PFX :66
    :FEAT :SSE4.1